{
  "id": "mcauser/micropython-74hc595",
  "name": "micropython-74hc595",
  "prettyName": "micropython-74hc595",
  "description": "MicroPython driver for 74HC595 shift registers",
  "version": "",
  "author": "mcauser",
  "license": "MIT",
  "tags": [],
  "status": "VALID",
  "official": false,
  "source": "https://github.com/mcauser/micropython-74hc595",
  "updatedAt": "2026-06-28T07:00:28.661Z",
  "page": "https://checkmim.com/packages/mcauser+micropython-74hc595",
  "createdAt": "2025-05-27T04:30:14.375Z",
  "submittedBy": "oliverr",
  "install": {
    "mpremote": "mpremote mip install github:mcauser/micropython-74hc595",
    "mip": "import mip; mip.install(\"github:mcauser/micropython-74hc595\")"
  },
  "readme": "# MicroPython 74HC595\n\nA MicroPython library for 74HC595 8-bit shift registers.\n\nThere's both an SPI version and a bit-bang version, each with a slightly\ndifferent interface. See below.\n\n![demo](docs/demo.jpg)\n\n\n### Installation\n\nUsing mip via mpremote:\n\n```bash\n$ mpremote mip install github:mcauser/micropython-74hc595\n$ mpremote mip install github:mcauser/micropython-74hc595/examples\n```\n\nUsing mip directly on a WiFi capable board:\n\n```python\n>>> import mip\n>>> mip.install(\"github:mcauser/micropython-74hc595\")\n>>> mip.install(\"github:mcauser/micropython-74hc595/examples\")\n```\n\nManual installation:\n\nCopy `src/sr74hc595_bitbang.py` and `src/sr74hc595_spi.py` to the root directory of your device.\n\n\n## SPI Version\n\nYou can use either HSPI or SPI. This version is significantly faster than the\nbit-bang version, but is limited to writing whole bytes of data.\n\n\n### SPI Example\n\n**Basic Usage**\n\n```python\nfrom machine import Pin, SPI\nfrom sr74hc595 import SR74HC595_SPI\n\nspi = SPI(1, 100000)\nrclk = Pin(5, Pin.OUT)\n\noe = Pin(33, Pin.OUT, value=0)    # low enables output\nsrclr = Pin(32, Pin.OUT, value=1) # pulsing low clears data\n\nsr = SR74HC595_SPI(spi, rclk, 2) # chain of 2 shift registers\n\nsr.pin(2,1)  # set pin 2 high of furthest shift register\nsr.pin(2)    # read pin 2\nsr.pin(2,0)  # set pin 2 low\n\nsr.toggle(8) # toggle first pin of closest shift register\n\nsr[0] = 0xff # set all pins high on furthest shift register\nsr[1] = 240  # set half pins high on closest shift register\nsr[1]        # read pins\n\noe.value(0)  # disable outputs\noe.value(1)  # enable outputs\n\n# pulse to clear shift register memory\nsrclr.value(1)\nsrclr.value(0)\n```\n\n### SPI Methods\n\nConstruct with a reference to `spi` and the `rclk` pin used for latching and an\noptional number of cascading shift registers.\n\nPins `srclr` and `oe` are optional.\nIf you don't need to clear the outputs, connect `srclr` to vcc.\nIf you don't need to disable the outputs, connect `oe` to gnd.\n\n```python\n__init__(spi, rclk, length=1, srclr=None, oe=None)\n```\n\nRead the boolean value of a pin. First pin is index `0`. If you are cascading shift\nregisters, the first pin of the second shift register is index `8` and so on. Index\n`0-7` are the furthest away shift register from the serial data in.\n\n```python\npin(index)\n```\n\nWrites a boolean value to a pin. This updates the internal buffer of pin values then\nwrites all of the values to each shift register in the chain.\n\n```python\npin(index, value, latch=True)\n```\n\nThis toggles a single pin by index. Helper for reading a pin then writing the opposite\nvalue.\n\n```python\ntoggle(index, latch=True)\n```\n\nThis lets you treat the class like a list, where each index represents a whole shift\nregister. Returns an 8-bit value for the shift register by index, where lowest index\nis furthest away.\n\n```python\n__getitem__(index)\n```\n\nWrite an 8-bit value to a shift register at the given index.\n\n```python\n__setitem__(index, value)\n```\n\nPrivate method for sending the entire internal buffer over SPI.\n\n```python\n_write(latch=False)\n```\n\nPrivate method for pulsing the `rclk` pin, which latches the outputs from the shift\nregister to the storage register and makes the outputs appear.\n\n```python\n_latch()\n```\n\n\n## Bit Bang Version\n\nThis version lets you have greater control over sending individual bits of data\nat the expense of the performance you get using SPI.\n\n### Bit Bang Example\n\n**Basic Usage**\n\n```python\nfrom machine import Pin\nfrom sr74hc595 import SR74HC595_BITBANG\n\nser = Pin(23, Pin.OUT)\nrclk = Pin(5, Pin.OUT)\nsrclk = Pin(18, Pin.OUT)\n\n# construct without optional pins\nsr = SR74HC595_BITBANG(ser, srclk, rclk)\n\nsr.clear()  # raises RuntimeError because you haven't provide srclr pin\nsr.enable() # raises RuntimeError because you haven't provide oe pin\n\n# reconstruct with all pins\noe = Pin(33, Pin.OUT, value=0)    # low enables output\nsrclr = Pin(32, Pin.OUT, value=1) # pulsing low clears data\n\nsr = SR74HC595_BITBANG(ser, srclk, rclk, srclr, oe)\n\nsr.bit(1)  # send high bit, do not latch yet\nsr.bit(0)  # send low bit, do not latch yet\nsr.latch() # latch outputs, outputs=0000_0010\n\nsr.bit(1, 1) # send high bit and latch, outputs=0000_0101\nsr.bit(0, 1) # send low bit and latch, outputs=0000_1010\n\nsr.bits(0xff, 4) # send 4 lowest bits of 0xff (sends 0x0f), outputs=1010_1111\n\nsr.clear(0) # clear the memory but don't latch yet\nsr.latch()  # next latch shows the outputs have been reset\n\nsr.bits(0b1010_1010, 8) # write some bits\nsr.clear()  # clear the memory and latch, outputs have been reset\n\nsr.enable()  # outputs enabled\nsr.enable(0) # outputs disabled\n```\n\n### Bit Bang Methods\n\nConstruct with references to each of the pins needed to write to the shift register(s).\n\nPins `ser`, `srclk` and `rclk` are required. Pins `srclr` and `oe` are optional.\nIf you don't need to clear the outputs, connect `srclr` to vcc.\nIf you don't need to disable the outputs, connect `oe` to gnd.\n\n```python\n__init__(ser, srclk, rclk, srclr=None, oe=None)\n```\n\nWrites a single value and can optionally latch to make it visible.\n\n```python\nbit(value, latch=False)\n```\n\nWrite multiple (`num_bits`) values from the supplied value and optionally can latch.\n\n```python\nbits(value, num_bits, latch=False)\n```\n\nPulses the `rclk` pin to latch the outputs. Without this, all of the bits you have\nwritten are remain hidden.\n\n```python\nlatch()\n```\n\nClears the shift register memory by pulsing the `srclr` pin. You will get a runtime\nerror unless you have provided this pin on construct.\n\n```python\nclear(latch=True)\n```\n\nToggles the output of the shift register by toggling the output enable (`oe`) pin.\nYou will get a runtime error unless you have provided this pin on construct.\n\n```python\nenable(enabled=True)\n```\n\nPrivate method for pulsing the `srclk` pin, which tells the shift register to read\nthe current state of the `ser` pin and copy it to the shift register memory.\n\n```python\n_clock()\n```\n\n\n## Chaining\n\nYou can connect multiple 74HC595 shift registers together to form a chain.\n\nConnect each shift registers `rclk`, `srclk`, `oe` and `srclr` together.\nIf you don't need to disable outputs, you can tie each `oe` to ground.\nIf you don't need to clear any outputs, you can tie each `srclr` to vcc.\n\nYour micro controller provides data to just the first shift registers `ser` pin.\n\nThe `QH\\`` output pin on the first shift register goes into the next shift register\n`ser` pin and so on.\n\nWhen clocking in data, the values appear on the closest shift register to the\nmicro controller first, before overflowing into each chained shift register.\n\n\n## Parts\n\n* [TinyPICO](https://www.tinypico.com/)\n* [74HC595 DIP-16](https://s.click.aliexpress.com/e/_DnLBdpL)\n* [74HC595 breakout](https://s.click.aliexpress.com/e/_Der4vyZ)\n\n\n## Connections\n\nTinyPICO       | 74HC595\n-------------- | -------\n3V3            | VCC\nG              | GND\nG (or a pin)   | OE\n23 MOSI        | SER\n18 SCK         | SRCLK\n5              | RCLK\n3V3 (or a pin) | SRCLR\n\nPin   | Name                   | Description\n----- | ---------------------- | -----------\nOE    | Output Enable          | Active low. Drive high to disable outputs.\nSER   | Serial Input           | Serial data sent LSB first.\nRCLK  | Storage Register Clock | Pulse to latch data to outputs.\nSRCLK | Shift Register Clock   | Serial input is read on rising edge.\nSRCLR | Shift Register Clear   | Active low. Drive/tie high to retain contents.\nQA-QH | Outputs                | 8 output pins\nQH\\`  | Serial Output          | Connect to the next 74HC595 SER pin\n\n\n## Links\n\n* [TinyPICO Getting Started](https://www.tinypico.com/gettingstarted)\n* [micropython.org](http://micropython.org)\n* [74HC595 datasheet](docs/sn74hc595n.pdf)\n\n\n## License\n\nLicensed under the [MIT License](http://opensource.org/licenses/MIT).\n\nCopyright (c) 2021 Mike Causer\n"
}